74HC76
Schematic symbol
Dual J-K flip-flop with set and reset: On each falling edge of CP, J high sets Q, K high resets it, both low keeps it and both high toggles it. SD low sets Q and RD low clears it. Note that VCC is pin 5 and GND is pin 13. Same pinout as the 74LS76.
integrated circuit
IC
chip
7400 series
logic
flip-flop
JK flip-flop
74HCT76
74LS76
7476
Details
- Reference Character
- U
- Default Value
- 74HC76
- Author
- Circuit Canvas
- License
- Circuit Canvas Parts License
- Library
- Circuit Canvas Library
