74LS90
Schematic symbol
Decade counter: A divide-by-2 stage (clock CKA, output QA) and a divide-by-5 stage (clock CKB, outputs QB–QD). Connect QA to CKB to count 0 to 9 in BCD. Both R0 inputs high reset to 0, and both R9 inputs high set the count to 9. Note that VCC is pin 5 and GND is pin 10. Pins 4 and 13 are not connected.
integrated circuit
IC
chip
7400 series
logic
counter
decade counter
BCD
ripple counter
TTL
7490
Details
- Reference Character
- U
- Default Value
- 74LS90
- Author
- Circuit Canvas
- License
- Circuit Canvas Parts License
- Library
- Circuit Canvas Library
