74HC597
Layout symbol
8-bit parallel-in, serial-out shift register with input latch: A rising edge on STCP captures D0–D7 in a storage latch; a low on PL copies the latch into the shift register, and each rising edge of SHCP shifts the data out on Q7. DS is the serial input for chaining, and MR low clears the shift register.
integrated circuit
IC
chip
7400 series
logic
shift register
parallel to serial
latch
74HCT597
74LS597
74597
Details
- Reference Character
- U
- Default Value
- 74HC597
- Author
- Circuit Canvas
- License
- Circuit Canvas Parts License
- Library
- Circuit Canvas Library
