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74LS93

Schematic symbol

4-bit binary counter: A divide-by-2 stage (clock CKA, output QA) and a divide-by-8 stage (clock CKB, outputs QB–QD). Connect QA to CKB to count 0 to 15. Both R0 inputs high reset the count. Note that VCC is pin 5 and GND is pin 10. Pins 4, 6, 7 and 13 are not connected.

integrated circuit IC chip 7400 series logic counter binary counter ripple counter TTL 7493

Details

Reference Character
U
Default Value
74LS93
Library
Circuit Canvas Library