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74HC73

Layout symbol

Dual J-K flip-flop with reset: On each falling edge of CP, J high sets Q, K high resets it, both low keeps it and both high toggles it. RD low clears Q. Note that VCC is pin 4 and GND is pin 11. Same pinout as the 74LS73.

integrated circuit IC chip 7400 series logic flip-flop JK flip-flop 74HCT73 74LS73 7473

Details

Reference Character
U
Default Value
74HC73
Library
Circuit Canvas Library