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74HC160

Schematic symbol

Synchronous decade counter with asynchronous reset: Counts from 0 to 9 on the rising edge of CP when both CEP and CET are high. PE low loads D0–D3 on the next clock, MR low clears the count right away, and TC goes high at 9 (while CET is high) so several chips can be chained. Same pinout as the 74LS160.

integrated circuit IC chip 7400 series logic counter decade counter BCD 74HCT160 74LS160 74160

Details

Reference Character
U
Default Value
74HC160
Library
Circuit Canvas Library