74HC166
Layout symbol
8-bit parallel-in, serial-out shift register with synchronous load: With PE low, the next rising edge of CP loads D0–D7; with PE high, each clock shifts the data one step toward the output Q7. CE must be low to clock, MR low clears the register, and DS is the serial input for chaining. Same pinout as the 74LS166.
integrated circuit
IC
chip
7400 series
logic
shift register
parallel to serial
74HCT166
74LS166
74166
Details
- Reference Character
- U
- Default Value
- 74HC166
- Author
- Circuit Canvas
- License
- Circuit Canvas Parts License
- Library
- Circuit Canvas Library
