74LS92
Schematic symbol
Divide-by-12 counter: A divide-by-2 stage (clock CKA, output QA) and a divide-by-6 stage (clock CKB, outputs QB–QD). Connect QA to CKB to divide by 12. Both R0 inputs high reset the count. Note that VCC is pin 5 and GND is pin 10. Pins 2, 3, 4 and 13 are not connected.
integrated circuit
IC
chip
7400 series
logic
counter
divide-by-12
ripple counter
TTL
7492
Details
- Reference Character
- U
- Default Value
- 74LS92
- Author
- Circuit Canvas
- License
- Circuit Canvas Parts License
- Library
- Circuit Canvas Library
